ICYMI: ASIC Convenes Albany Summit to Strengthen and Ready Plans for National Semiconductor Technology Center
Recently, the American Semiconductor Innovation Coalition (ASIC) hosted a two-day summit in Albany to build on its previously released vision for a proposed National Semiconductor Technology Center (NSTC) and National Advanced Packaging Manufacturing Program (NAPMP). During the summit, ASIC leaders discussed and further developed specific plans for the organization’s governance, intellectual property, and education and workforce development.
ASIC’s governance structure is uniquely positioned for the NSTC and NAPMP, and offers a well-established and proven chip ecosystem in New York that can stand up both an NSTC innovation hub and additional regional hubs in as little as six months and support connected packaging programs. Additionally, ASIC recently expanded to include new members like NVIDIA, DuPont, and Global Foundries – and now sits at 150+ members that represent all stages of the chipmaking design and supply chain.
Following the passage of the CHIPS and Science Act, the Department of Commerce released their “CHIPS for America” implementation plan that outlines four strategic goals:
Invest in the U.S. production of semiconductors
Assure a secure supply of older and current chips for national security and critical manufacturing
Strengthen U.S. semiconductor leadership
Grow a diverse, robust semiconductor workforce
If selected by the Department of Commerce, ASIC will be ready to execute on Day One. The recent summit expands on previously released plans – including a vision and Request for Information response to the Department of Commerce – to ensure that ASIC’s growing network will be sustainable for long-term contributions to U.S. semiconductor leadership for decades to come.
Expanding the semiconductor workforce
Semiconductor ecosystems are driven by the diverse and constantly evolving talents of American workers. ASIC members are united in the belief that the NSTC and NAPMP should be a force for inclusive, well-paying jobs across the U.S., with a continuing effort to diversify and grow the semiconductor workforce.
ASIC’s initial vision for the NSTC underscored the essential role of universities when building this workforce, and outlined activities necessary to strengthen the “lab-to-fab” pathway, including:
Expanding on-the-job training along with an advanced electronic and electronic/photonic packaging curriculum.
Increasing visibility of packaging fundamentals in community college and university curricula.
Developing the ASIC curriculum with a series of course offerings, which will then be offered to students who will take internships or research projects at the NAPMP.
Leveraging current college/university programs to coordinate student access to full-flow packaging lines within NSTC and NAPMP.
ASIC is committed to these efforts and at the summit announced an NSTC University Program to help research institutions across the country build the next generation of semiconductor innovators. Coalitions of Excellence (CoE) will establish their own “University Research Focus Centers” (UFC) that include universities with broad technical expertise, educational programs with outreach beyond campus, and unique facilities and talent that will benefit the CoE’s research agenda. All university participants in the UFC would belong to one regional cluster, and the program would include an emphasis on recruiting minority-serving institutions and institutions new to the microelectronics enterprise.
In addition to its University Program, ASIC’s vision for the NSTC will expand industry-relevant education and training programs, increase awareness of semiconductor career pathways in public school systems, and promote a sustainable culture of diversity and equity as a core principle for all activities.
Establishing ASIC’s governance structure
ASIC is capable of rapidly opening a fully operational hub for the technology network and establishing university and company-led “Coalitions of Excellence” (COE) to support the hub’s operations. With similar membership to the coalition, these centers will include companies that represent different stages of the design and chipmaking process. To complement the COEs, a cross-COE team will be established to share ideas, best practices, and future planning.
Critically, to address existing gaps within the industry and increase diverse representation across the workforce, ASIC will prioritize underrepresented regions, colleges, and companies when developing the COEs. Together, these will create a sustainable ecosystem that includes a wide variety of stakeholders: from academia to corporations to nonprofits to organizations large and small.
Building economic success
When comparing recent fundraising activities within the industry, the United States is lagging behind China by a large margin. It’s critical that the NSTC is financially sustainable, responsible, and equipped to compete and position the U.S. for economic success. That’s why the overall governance of the NSTC will include a $500 million investment fund that provides early stage funding to startups and early-stage companies focused on semiconductor manufacturing, prototyping, and design.
Through the investment fund, ASIC will encourage collaboration between startups, academia, and established companies in a constantly-evolving technology network.
Additionally, small and medium-sized enterprises (SMEs) frequently lack the ability to rapidly prototype, which creates an innovation and fairness gap throughout the industry. These partnerships help close this gap by providing SMEs access to advanced prototyping facilities, first-class resources, and industry-leading scientists who can work quickly to transfer breakthrough technology to chip manufacturing. An increased startup presence within the NSTC and NAPMP also allows for a more robust semiconductor workforce by creating new employment opportunities across the region.
Moving Forward
The CHIPS and Science Act made a once-in-a-generation investment in semiconductor manufacturing and R&D. ASIC is committed to ensuring that the American taxpayer gets a return on this down payment by developing groundbreaking chip innovation right here at home.
During the coming months, ASIC looks forward to demonstrating how its ambitious technical agenda, leadership in workforce and development, resources for SMEs, and existing state of the art infrastructure will allow the coalition to successfully stand up the NSTC and NAPMP to deliver for the American people.
